Method and apparatus for manufacturing stacked-type semiconductor device

ABSTRACT

A method of manufacturing a stacked-type semiconductor device, comprises: arranging a plurality of stacked chips obtained by stacking semiconductor chips on a plurality of stages on a support substrate; connecting a semiconductor chip of each stage in each stacked chip and the support substrate by wire while performing heating in units of stacked chips; performing plastic molding of each stacked chip; and separating the stacked chips from each other. 
     An apparatus for manufacturing a stacked-type semiconductor device, comprising divided heater blocks formed under a support substrate on which a plurality of stacked chips obtained by stacking a plurality of semiconductor chips are arranged, the divided heater blocks being formed with respect to the stacked chips, and a heating device to selectively transmit heat to a stacked chip subjected to a wire bonding.

CROSS REFERENCE TO RELATED APPLICATIONS

This application is based upon and claims the benefit of priority fromthe prior Japanese Patent Application No. 2004-234461 filed on Aug. 11,2004 the entire contents of which are incorporated herein by reference.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates to a method of manufacturing astacked-type semiconductor device in which plurality of semiconductorchips are stacked and an apparatus for manufacturing a stacked-typesemiconductor device to realize the manufacturing method.

2. Related Art

Upon the recent demand for multifunctionality of a semiconductor device,to realize advancement in a small occupied area, a stacked-typesemiconductor technique, which stacks a plurality of semiconductor chipsin a multistage in one package, fixes the semiconductor chips with anadhesive agent and performs necessary interlayer wiring, is popularized.

The stacked-type semiconductor device is disclosed in, e.g., JapanesePatent Application Laid-open No. 2002-294723. A lowermost substrate is asupport substrate in which vertical through holes (or via holes) areformed. In this example, the rear surfaces of two semiconductor chipsmatched to each other and stacked through a heat-radiating adhesiveagent, and the upper semiconductor chip and the support substrate areconnected by wires.

Application of the technique makes it possible to form a stacked-typesemiconductor device having a large number of stages, i.e., three ormore layers.

When wire bonding is performed between a semiconductor chip on eachstacked stage and a support substrate of multistage in the stacked-typesemiconductor device including a large number of stages, it isphysically impossible to simultaneously perform bonding of the stackedstages. For this reason, wire bonding is performed every stacked stage.When this connection is performed, the temperature of a connectionportion must be increased to improve reliability of the connectionwithin a short period of time. For this reason, heating is required andgenerally achieved such that stacked chip to be heated is heated by abonding heater.

A plurality of stacked structures are formed in the form of a matrix ona large support substrate in manufacturing a stacked-type semiconductordevice, and the stacked structures are separated from each other uponcompletion of the semiconductor devices.

However, since conventional heating is to heat a support substrate as awhole, the heating is devised by using a column mechanism or the likesuch that the support substrate is entirely heated each time one stackedchip is formed to avoid continuous heating. However, the stacked chipsmust be heated for a period of time required to heat all the stackedchips in the matrix.

As described above, in the conventional technique, the substrate isentirely heated, so that the lowermost chips in the stacked layersespecially receive thermal histories in units of matrix frames times thenumber of which is equal to the number of times of wire bonding. Thelarge number of thermal histories deteriorate an adhesive agent holdingthe stacked stage, and peeling disadvantageously occurs when thesemiconductors are mounted on substrates.

SUMMARY OF THE INVENTION

According to one aspect of the present invention, there is provided amethod of manufacturing a stacked-type semiconductor device, comprising:

arranging a plurality of stacked chips obtained by stackingsemiconductor chips on a plurality of stages on a support substrate;

connecting a semiconductor chip of each stage in each stacked chip andthe support substrate by wire while performing heating in units ofstacked chips;

performing plastic molding of each stacked chip; and

separating the stacked chips from each other.

According to another aspect of the invention, there is provided anapparatus for manufacturing a stacked-type semiconductor device,comprising:

divided heater blocks formed under a support substrate on which aplurality of stacked chips obtained by stacking a plurality ofsemiconductor chips are arranged, the divided heater blocks being formedwith respect to the stacked chips, and wherein

the divided heater blocks are designed to selectively transmit heat tothe stacked chip subjected to a wire bonding operation.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a sectional view of a stacked-type semiconductor device towhich the present invention is applied.

FIG. 2 is a perspective view showing divided heater blocks used in amanufacturing method according to the present invention.

FIG. 3 is a perspective view for explaining heating control of dividedheater blocks in the manufacturing method according to the presentinvention.

FIG. 4 is a graph for explaining a temperature control pattern of thedivided heat blocks in a manufacturing apparatus according to thepresent invention.

FIG. 5 is a diagram for explaining a vertical moving mechanism using acam in the manufacturing apparatus according to the present invention.

FIG. 6 is a graph showing an effect obtained by the manufacturing methodaccording to the present invention.

FIG. 7 is another graph showing the effect obtained by the manufacturingmethod according to the present invention.

FIG. 8 is a diagram showing a variation of the manufacturing apparatushaving dual structures of FIG. 5 according to the present invention.

DETAILED DESCRIPTION OF THE INVENTION

Several embodiments of the present invention will be described belowwith reference to the accompanying drawings.

FIG. 1 is a sectional view showing a configuration of a stacked-typesemiconductor device 100 applied to the present invention.

On a support substrate 1 having connection electrodes 11 such as bumpsformed on the rear surface, a first semiconductor chip 3 is mountedthrough an adhesive agent layer 2. A second semiconductor chip 5 smallerthan the first semiconductor chip is mounted on the first semiconductorchip through an adhesive agent layer 4. A spacer 6 is arranged on thesecond semiconductor chip, and a third semiconductor chip 8 smaller thanthe first semiconductor chip 3 and larger than the second semiconductorchip is mounted on the spacer 6 through an adhesive agent layer 7.Furthermore, a fourth semiconductor chip smaller than the thirdsemiconductor chip is mounted on the third semiconductor chip 8 throughan adhesive agent layer 9. In this stacked structure, the secondsemiconductor chip 5 is smaller than the first semiconductor chip 3, andthe fourth semiconductor chip is smaller than the third semiconductorchip to easily perform wire bonding. More specifically, the electrodesof the first to fourth semiconductor chips are connected to theelectrodes on the support substrate 1 by wires 13, 14, 15, and 16 toprevent the electrode positions on the chips from shifting and crossingin the horizontal and vertical directions. The wire bonding is performedbecause the wires have high reliability and high flexibility.

The use of the spacer 6 makes it possible to stack the thirdsemiconductor chip 8 larger than the spacer 6 by forming the spacer 6.

In the stacked-type semiconductor device, adhesive layers are formed onthe lower surfaces of the semiconductor chips to constitute stages, thesemiconductor chips are stacked and fixed at a predetermined position,and the stacked structure is fixed on the support substrate by diebonding. Since the die bonding is performed at a temperature of, e.g.,150° C. for one second, curing is performed at the same temperature forabout 1 hour in an oven to prevent warpage or the like of the substrate.

In the wire bonding step, heating is performed at a temperature of,e.g., 175° C. for about 15 minutes.

The entire structure is molded with plastic upon completion of the wirebonding to form a plastic-molded structure 12. Dicing is performed toseparate chips from each other to complete stacked-type semiconductordevices.

FIG. 2 is a perspective view showing an embodiment of a method ofmanufacturing a stacked-type semiconductor device according to thepresent invention. As shown in FIG. 2, a large number of stacked chips20 are formed on the support substrate 1 in the form of a matrix, anddivided heaters 30 are arranged under the stacked chips 20 with respectto each other. In FIG. 2, nine stacked chips are arranged in a 3×3matrix. However, the number of chips can be appropriately selected inconsideration of the size of the substrate, the sizes of the chips, andthe like.

The applied heater is, for example, a ceramic heater or an infraredheater. As control methods for the heater, any available method such asa pulse control method or a voltage-current control method can be used.

The block parts of the divided heaters 30 are designed to be able to beindependently controlled in temperature. Therefore, as shown in FIG. 3,when a wire bonding operation is performed to a stacked chip 21 at thepresent, a heater to be heated heats a heater block 31 immediately underthe stacked chip 21. When the wire bonding operation is performed to thenext stacked chip 22, the heater block to be heated shifts to a heaterblock 32 immediately under the heat block. A heater block to be heatednext sequentially shifts to a heater block 33 corresponding to a stackedchip 23. The shift is performed on the entire support substrate toperform the wire bonding operations to all the stacked chips.

In this heating, a target heater block may be turned on/off as shown bya pattern A in FIG. 4. However, in order to accelerate the heatingoperation, as shown by a pattern B in FIG. 4, a low current is caused toflow in all the heater blocks from the start of the heating operation,so that the temperature of the heater blocks reach a predeterminedpreheating temperature lower than the operation temperature. In wirebonding, a high current is caused to flow in the heat blocks to increasethe temperature of the target heat block to the operation temperature ormore, so that the target stacked chip can be heated.

Temperature management of the respective heat blocks can be easilycontrolled in accordance with the progress of the operation.

The division of the heater blocks may be performed such that not onlyone stacked chip is heated as in the embodiment but also stacked chipsare heated in units of rows or columns of a matrix.

FIG. 5 is a conceptual diagram showing another embodiment of a method ofmanufacturing a semiconductor device according to the present invention.In this embodiment, a divided heater block shown in FIG. 2 isselectively vertically moved by a cam mechanism, so that the heaterblock is brought into direct contact with the lower surface of a stackedchip to be wire-bonded. More specifically, the heater blocks 30 can bevertically moved. Rollers 40 as cam followers are provided under theheater blocks 30. The follower rollers 40 are placed on a cam plate 50having a raised portion corresponding to one heater block. The cam plate50 is connected to a cylinder 60 arranged on a side of the cam plate 50so that the cam plate 50 can be moved in the expansion/contractiondirection of the cylinder. Therefore, the cylinder 60 is controlled tolocate the raised portion 51 immediately under a stacked chip to bewire-bonded, so that only the stacked chip can be heated.

In this manner, the heater is mechanically approximated to a targetstacked chip to make it unnecessary to complex temperature managementfor respective heaters.

FIG. 6 is a graph showing an effect obtained by the present invention.The graph shows a relationship between an increase in thermal historywhen wire bonding at 175° C. is repeated and molding is performed atlast and tensile strengths (MPa) of adhesive agents of stacked chips.According to this graph, in conventional overall heating, the curedadhesive agents of the third and subsequent layers are considerablybrittle. In contrast to this, in the present invention, it is understoodthat, even though the number of layers of the stacked chips is five,curing of the adhesive agents does not excessively advance. In thegraph, a case in which only a stacking process is performed withoutperforming wire bonding is shows as a comparative example. Valuesobtained in this comparative are exactly equal to the values obtained inthe present invention. It is understood that the stacked chips are notadversely affected by embrittlement caused by conventional overallheating when the present invention is applied.

FIG. 7 is another graph showing the effect obtained by the presentinvention. The graph shows a relationship between the number of wirebonding steps when reflow is performed at 260° C. and a peeling rate ofan adhesive agent. In the conventional technique, as the number of timesof wire bonding, the peeling rate considerably increases. In the presentinvention, peeling is not observed at all. It is understood that theadvantage is achieved because the embrittlement of the material does notadvance in FIG. 6.

FIG. 8 is a conceptual diagram showing another embodiment of a method ofmanufacturing a semiconductor device according to the present invention.In this embodiment, a plurality of heating devices shown in FIG. 5 areprovided. More specifically, in FIG. 8, two of heating devices shown inFIG. 5 are serially and symmetrically disposed. In FIG. 8, the sameelements as in FIG. 5 are given the same reference numerals, butaccompanied suffix a in the left side and b in the right side. Thereason why the two heating mechanisms are disposed symmetrically is toavoid collision of the cam plates and cylinders.

This structure enables two heating procedures at the same time andresult in doubled productivity.

It is apparent that further heating mechanisms can be disposed in thedirection perpendicular to the drawing, namely in parallel.

As described above, according to the present invention, when amultilayer package using a matrix frame in which semiconductor chips arestacked on several stages and electrically connected to a substrate bywire bonding is formed, a heater does not heat the entire surface of thesemiconductor chips but locally heats only a chip to be bonded. For thisreason, a thermal history per chip is reduced to make it possible toprevent adhesive agents between the chip and the substrate and betweenthe lower chip and the upper chip from being deteriorated.

1.-4. (canceled)
 5. An apparatus for manufacturing a stacked-typesemiconductor device, comprising divided heater blocks formed under asupport substrate on which a plurality of stacked chips obtained bystacking a plurality of semiconductor chips are arranged, the dividedheater blocks being formed with respect to the stacked chips, and aheating device to selectively transmit heat to a stacked chip subjectedto a wire bonding.
 6. The apparatus for manufacturing a stacked-typesemiconductor device according to claim 5, wherein a selected one of thedivided heater blocks is movable upward by means of a moving mechanism.7. The apparatus for manufacturing a stacked-type semiconductor deviceaccording to claim 6, wherein the moving mechanism comprises a cam platehaving a profile varying height driven in a lateral direction and a camfollower coupled to a lower side of the selected heater block.
 8. Theapparatus for manufacturing a stacked-type semiconductor deviceaccording to claim 7, wherein the cam follower is a roller.
 9. Theapparatus for manufacturing a stacked-type semiconductor deviceaccording to claim 6, wherein said moving mechanism is provided forplural number.
 10. The apparatus for manufacturing a stacked-typesemiconductor device according to claim 9, wherein a plurality of saidmoving mechanism are disposed in parallel and/or serially.